The present invention relates to a signal output apparatus, and more particularly to a signal output apparatus suitable for use as a wireless remote control unit (commander) which transmits temporarily stored data to a controlled apparatuses.
Various types of output apparatus are known which output control signals or the like to a controlled apparatus. For example, in the case of a VTR, a wireless remote control unit with a built-in CPU, temporarily stores data such as reserved program recording data which include the date and time of program start/end, channel number, and the like, and thereafter outputs the data to a controlled VTR.
A conventional signal output apparatus is constructed as shown in FIG. 4. Under control of a CPU section 102, data entered by an operator is temporarily stored in an output data storage unit 101 having a RAM, decoder and the like. When the data is to be output, the CPU section 102 fetches the data and controls main clocks (carrier) (A2) to be output from a signal output section 105 in accordance with the fetched data. Main clocks from the CPU section 102 have the waveform as shown in FIG. 5B. A time count section 104 instructs the control timings when the main clocks (A2) are output. Each time an instruction is received, the CPU section 102 sends a set command or a reset command to the signal output section 105. This command is composed of an output control signal (A1) such as shown in FIG. 5A. Data "0" is represented by a combination of one period t of high level and one period t of low level, whereas data "1" is represented by a combination of one period t of high level and three periods 3t of low level. For example, data "0110" stored in the output data storage section 101 are converted into a signal A1 shown in FIG. 5A. At the rising edge of the output control signal A1, a set command is sent to the signal output section 105, and at the falling edge thereof, a reset command is sent to the signal output section 105. The signal output section 105 outputs main clocks when it receives the set command and stops outputting them when the reset command is received. The data are output as the signal A3 as shown in FIG. 5C.
All the processes for generating an output control signal Al from given data are executed by the CPU section 102. Accordingly, during executing these processes, the CPU section 102 cannot execute other processes. Furthermore, it requires much labor and time for obtaining software used for the execution of these processes by the CPU section, thereby resulting in an increased cost.